王彬，博士，集成电路科学与工程学院教授。本科毕业于清华大学工程物理系，获美国马里兰大学（University of Maryland, College Park）微电子可靠性工程博士学位。曾在美国国家标准技术研究院（NIST）、Impinj Inc.、Virage Logic、Spansion LLC 等科研机构与芯片设计企业长期从事研发工作，具备全球产业链视野与工程化落地能力，曾担任上海集成电路研发中心首席架构师。2010 年起创办江苏稻源科技集团，任董事长、技术负责人。入选国家科技部“创新创业人才”，曾获浙江省“特聘教授/钱江学者”称号，并入选江苏省“双创人才”。

Bin Wang, Ph.D., is a Professor at the School of Integrated Circuits Science and Engineering. He received his B.S. in Engineering Physics from Tsinghua University and his Ph.D. in Microelectronic Reliability from the University of Maryland, College Park. He previously worked at the U.S. National Institute of Standards and Technology (NIST), Impinj Inc., Virage Logic, and Spansion LLC, focusing on advanced processes, device reliability, memories, and RFID chip R&D. With a strong global semiconductor supply‑chain perspective and proven engineering execution, he also served as Chief Architect at the Shanghai IC R&D Center. Since 2010, he has founded Jiangsu Daoyuan Technology Group and served as Chairman and Chief Technical Lead. He was selected for China’s Ministry of Science and Technology ‘Innovation and Entrepreneurship Talent’ program, received the Zhejiang ‘Distinguished Professor / Qianjiang Scholar’ title, and was recognized as a Jiangsu ‘Double‑Innovation Talent’.

王彬教授在半导体研发与产业化方面深耕 20 余年，主持/参与科研项目约 20 项，累计科研经费接近人民币 1 亿元；发表论文 50 余篇，拥有授权发明专利 80 余项。主导近 20 颗集成电路芯片的研发与产业化，累计芯片出货量超过 1000 亿颗，创办企业累计营收超过人民币 10 亿元，并牵头建设 1 个国家级与多个省级研发平台。

Professor Wang has been engaged in semiconductor R&D and commercialization for over 20 years. He has led or participated in ~20 research projects with total funding close to RMB 100 million, published 50+ papers, and holds 80+ granted invention patents. He has spearheaded the R&D and industrialization of nearly 20 IC chips, with cumulative shipments exceeding 100 billion units and cumulative company revenue exceeding RMB 1 billion. He has also led the establishment of one national‑level and multiple provincial‑level R&D platforms.

研究领域聚焦端侧智能计算、存算一体/近存计算、嵌入式存储、及低功耗无源物联网的交叉方向，强调可量产约束下的电路、架构及算法协同：

His research focuses on the interdisciplinary areas of edge intelligent computing, compute‑in/near‑memory, embedded memories, and ultra‑low‑power passive IoT, emphasizing circuit–architecture–algorithm co‑design under manufacturability constraints:

*端侧AI芯片与软硬协同：面向推理加速与能效优化，研究NPU微架构、片上存储层级、数据流/带宽优化、算子支持与工具链协同。

Edge‑AI chips and hardware–software co‑design: for inference acceleration and energy‑efficiency optimization, he studies NPU micro‑architectures, on‑chip memory hierarchies, dataflow/bandwidth optimization, operator support, and toolchain integration.

* 存算一体（Compute-in/near-memory）：面向低比特推理与视觉/感知任务，研究近存计算阵列、误差建模与鲁棒性、映射与编译协同。

Compute‑in/near‑memory: targeting low‑bit inference and vision/sensing workloads, he investigates near‑memory compute arrays, error modeling and robustness, and co‑optimization across mapping and compilation.

*嵌入式非易失存储（MTP/EEPROM/eNVM）与可靠性工程：研究器件物理机制、阵列与外围电路、退化机理与加速测试/失效分析。

Embedded non‑volatile memories (MTP/EEPROM/eNVM) and reliability engineering: he studies device physical mechanisms, arrays and peripheral circuits, degradation mechanisms, accelerated testing, and failure analysis.

*超低功耗无源物联网（RFID/NFC）与RF/模拟前端：研究射频/模拟前端、基带与协议实现、安全认证与系统集成。

Ultra‑low‑power passive IoT (RFID/NFC) and RF/analog front‑ends: he studies RF/analog front‑ends, baseband and protocol implementation, secure authentication, and system integration.

*国家级重大项目（2009）：嵌入式多模多频收发机硬核（Hard IP）研发。

National‑level major project (2009): development of embedded multi‑mode/multi‑band transceiver hard IP

*国家科技重大专项（2009）：65/45/32 nm工艺研发与产业化相关任务。

National S&T Major Project (2009): tasks related to 65/45/32‑nm process R&D and industrialization

*科技部创新基金（2014）：标准CMOS工艺UHF电子标签芯片。

MOST Innovation Fund (2014): UHF RFID tag chip in standard CMOS technology.

*江苏省科技支撑计划（2015）：标准CMOS工艺UHF电子标签芯片研发。

Jiangsu Provincial S&T Support Program (2015): R&D of UHF RFID tag chip in standard CMOS technology.

*江苏省产业转型项目（2017）：新一代UHF标签研发与产业化。

Jiangsu Industrial Transformation Project (2017): next‑generation UHF tag R&D and industrialization.

*江苏省自然科学基金（2018）：NFC芯片性能与物联网应用。

Jiangsu Natural Science Foundation (2018): NFC chip performance and IoT applications.

*江苏省前沿技术项目（2024）：存算一体视觉处理芯片关键技术。

Jiangsu Frontier Technology Project (2024): key technologies for compute‑in‑memory vision processing chips.

1. 代表性论文（节选）： Selected Publications:

· Bin Wang; J. S. Suehle; E. M. Vogel; J. B. Bernstein, “Time-Dependent Breakdown of Ultra-Thin SiO₂ Gate Dielectrics Under Pulsed Biased Stress,” IEEE Electron Device Letters, 2001.

· J. S. Suehle; E. M. Vogel; P. Roitman; B. Wang; J. B. Bernstein, “Observation of Latent Reliability Degradation in Ultra-Thin Oxides After Heavy-Ion Irradiation,” Applied Physics Letters, 2002.

· Yanjun Ma; T. Gilliland; Bin Wang;, “Reliability of pFET EEPROM with 70 Å Tunnel Oxide Manufactured in Generic Logic CMOS Processes,” IEEE Transactions on Device and Materials Reliability, 2004.

· B. Wang; Y. Ma; R. Paulson; C. Diorio; T. Humes, “Measurement of Ultra-Low Gate Tunneling Currents Using Floating-Gate Integrator Technique,” IEEE Electron Device Letters, 2005.

· Bin Wang; Hoc Nguyen; Yanjun Ma; R. Paulsen, “Highly Reliable 90nm Logic Multi-time Programmable NVM Cells Using Novel Work-Function Engineered Tunneling Devices,” IEEE Transactions on Electron Devices, 2007.

· Yanjun Ma; Rui Deng; H. Nguyen; Bin Wang, “Floating-Gate Nonvolatile Memory With Ultra-Thin 5-nm Tunnel Oxide,” IEEE Transactions on Electron Devices, 2008.

· M. Li; Y. Guo; H. Lin;; B. Wang, “Capacitance-Voltage Characteristics of Symmetric Stacked Bonding Structure in 3D Integration,” ECS Transactions, 2014.

· Hai Peng Zhang; Qiang Zhang; Mi Lin; Bin Wang, “A GaN/InGaN/AlGaN MQW RTD for versatile MVL applications with improved logic stability,” Journal of Semiconductors, 2018.

2. 代表性专利（节选）： Selected US Patents

· 7145203 (2006) Bin Wang, “Graded-Junction High Voltage MOSFET in Standard Logic CMOS.”

· 7263001 (2007) Bin Wang et al., “Compact NVM Cell and Arrays.”

· 7257033 (2007) Bin Wang et al., “Inverter Non-Volatile Memory Cell and Array System.”

· 7315067 (2008) Bin Wang, “Native HV NMOSFET in Standard CMOS Process.”

· 7375398 (2008) Bin Wang, “High Voltage FET Gate Structure.”

· US 20050258461 Bin Wang, “High-Voltage LDMOS and Applications Thereof in Standard CMOS.”

· US 20060220096 Bin Wang et al., “Tunneling-Enhanced Floating-Gate Semiconductor Device.”

· US 20060226489 Bin Wang, “Retention-Enhanced Programmable Shard Gate Logic Circuit.”

· US 20070093028 Bin Wang, “Graded-Junction High Voltage Semiconductor Device.”

· US 20070263456 Bin Wang et al., “Inverter Non-Volatile Memory Cell and Array System.”

累计指导研究生硕士生16名。

Supervised a total of 16 master's students.